Hello, im currently planning a build and thought i would "steal" the ldvor TPS7A4700 regulator and make my own, it wasnt really rocketsience, i just looked at the BOM and at the official datasheet...
you mean like lose capacitance over time?My recommendation is to use low esr tantalum caps, and c0g 0.1uf to aditionally reduce esr. I know DS says x7r and x5r are acceptable, but they loose a lot of capacitance if not grossly overspeced
why is that? i placed all capacitors as close as possible to the pin, i wouldnt be able to place them closer even with a bigger layout, you just cant really count the row of 5 resistors since they are 5x 10uF to get to the datasheet recommended 47uF while lowering ESRAnother thing though, don't expect performance to be as stated on the datasheet, again too small of an area to obtain best results.
definitely a bit true, i just went for a more userfriendly voltage setting, its definitely preference here but the design can be improved with smaller padsAs for design, i'd loose trough hole pins and use smd jumpers, where you can just apply blogs of solder and connect pads. Save on space = make better layout.
X7R and X5R loose capacitance when voltage and heat applied. Quite dramatically if their V rating is not way beyond derated. Some cases over 70% of capacitance, so your regulator doesn't have 50uF on output for example, but 20uF.you mean like lose capacitance over time?
If it were as easy as that... Circuit impedance is very important for these kind of regulators. Best is to use planes instead of traces, you risk LC tank circuit, which brings oscilations. And you haven't prepared for it with a pad for tant that has ~300mOhm esr on input to prevent that. Fingers crossed that it doesn't happen. You must look this design under oscilloscope when you print and solder it. Usually it's best to make a design as similar as possible to the wanted end result, but add pads for all kind of passives you may require since it's an smd design, and it's quite hard to rewire, add components etc..why is that?
hmm and this is not calcuclated already into the recommended values? i kinda thought its hard to go wrong with the datasheet reocmmendation, after all they probably evaluated the design with the recommended values/parts, no?X7R and X5R loose capacitance when voltage and heat applied. Quite dramatically if their V rating is not way beyond derated. Some cases over 70% of capacitance, so your regulator doesn't have 50uF on output for example, but 20uF.
do you have something to read on multiple planes designs? im still kinda unsure how i should design a 4 layer boardIf it were as easy as that... Circuit impedance is very important for these kind of regulators. Best is to use planes instead of traces, you risk LC tank circuit, which brings oscilations. And you haven't prepared for it with a pad for tant that has ~300mOhm esr on input to prevent that. Fingers crossed that it doesn't happen. You must look this design under oscilloscope when you print and solder it. Usually it's best to make a design as similar as possible to the wanted end result, but add pads for all kind of passives you may require since it's an smd design, and it's quite hard to rewire, add components etc..
You would be surprised how much datasheets can miss/forget to include stuff. One big thing for 4701 is that they missed the 10nf cff cap to minimize noise as much as possible, aith feedback resistors. Yes they said use x7r and x5r, but have not mentioned appropriate voltage derate. Thats up to the designer to know his stuff. As i said above, it will loose a lot of capacitance, and you've placed small footprint which to me say you used 50V caps as bom which is not enough. I wouldn't use below 100V for x7r and x5r for maximum output of your reg. Also note that datasheet says 50uf for stability, you won't have nearly as much. Thats why i said use low esr tantalum and 0.1uf cog, that will be low enough esr and you won't have caps that are piezoelectric as a bonus.hmm and this is not calcuclated already into the recommended values? i kinda thought its hard to go wrong with the datasheet reocmmendation, after all they probably evaluated the design with the recommended values/parts, no?
I meant planes on top plane in a two layer pcb. Using vias is not recommended for such ldo's.do you have something to read on multiple planes designs? im still kinda unsure how i should design a 4 layer board
i was also thinking of getting a cheap-ish ocilloscope, or atleast measure with a ADC the performance of the circuits (as long its possible with a ADC), to atleast detect bad design
Also note that datasheet says 50uf for stability,
i guess with tolerances you have to actually do 47uF and calculate the possible tolerance of the cap, so in reality it probably is a 56 or 58uF cap (if you dont calculate in cog as you say)Yes they said use x7r and x5r, but have not mentioned appropriate voltage derate. Thats up to the designer to know his stuff.
Chapter 8.2.2.1 in datasheet clearly mentions derating.Yes they said use x7r and x5r, but have not mentioned appropriate voltage derate.
ahh, sorry i thought you just mean ceramics (MLCC) but its either X7R or C0G10uf c0g is imposible 😁 probably x7r. C0g is a very low value cap, mostly highest used is 0.1uf. But there are a bit larger, though at bigger foootprint and much higher price.
ah you might be right, i picked SEPF 35V, sorryLast i recall sepc had top V value of 16V. Be careful there with how much vout you set on regulator.
Did you already experiment with this regulator? or is this more of a general recommendation? tho i might as well go with it, i dont have that much expierenceI'd use 47uf low esr tantalum with 0.1uf. But you are free to use whatever you please, but do get a scope, and check stability once you make it, under load of course.
is derating 50% like this: datasheet mentions 47uF, you take 50% and put it on top? so 68uF would be the more appropiate real world value for output?Chapter 8.2.2.1 in datasheet clearly mentions derating.
Missed that. Still 50% for class 2 is too little. Definitely not gonna be 50uf with that.Chapter 8.2.2.1 in datasheet clearly mentions derating.
It is about voltage and 50% is too little especially for X5R. I have tested some 22uF 25/35V X5R capacitors which had about 30% capacitance left at 15V.is derating 50% like this: datasheet mentions 47uF, you take 50% and put it on top? so 68uF would be the more appropiate real world value for output?
Edit: oh i think its about the voltage... so better use double the max voltage for capacitors
voltage limit seems to be the limitation of tants, is 35V here fine? personally i probably wont use them above 15V@Ghoostknight yes, use 0.1uf c0g if you use tantalums or elcos. No need if you end up using mlcc.
Yes, it is a part of my latest design. There also have been people that have made more detailed measurements with tants vs mlcc on tps regs.